IBM Research takes responsibility for technology and its role in society. Working in IBM Research means you'll join a team who invent what's next in computing, always choosing the big, urgent and mind-bending work that endures and shapes generations. Our passion for discovery, and excitement for defining the future of tech, is what builds our strong culture around solving problems for clients and seeing the real world impact that you can make. IBM's product and technology landscape includes Research, Software, and Infrastructure. Entering this domain positions you at the heart of IBM, where growth and innovation thrive. IBM Research at Albany, NY is seeking a process integration engineer who will push boundaries in the integration of advanced logic and next generation semiconductor packaging technologies. In this role, you will be responsible for leading the integration of processes that span the back end of the line (BEOL) silicon semiconductor processing, wafer finishing, and grindside processing. You will have a critical role in driving the development of 2.x and 3D silicon technologies and beyond. The position requires close collaboration with cross-functional and multi-company working teams that include engineers engaged in unit process development, materials and process development, structural/chemical/electrical analysis, and layout design.
Developers and Engineers at IBM Research play a pivotal role in advancing innovation by overseeing the design, construction, testing, and characterization of both hardware and software. This multifaceted responsibility spans from individual devices to system-level implementations. Our team is dedicated to enabling and supporting internal research initiatives, evaluating emerging technologies for their potential application in real-world products, and demonstrating the value of these technologies for IBM's businesses and strategic partners. Key Responsibilities Include: Research-Driven Development: Drive the development process in alignment with internal research goals, ensuring that the hardware and software solutions meet the unique requirements of our research endeavors. Emerging Technology Evaluation: Evaluate emerging technologies to discern their suitability for real-world product applications, conducting thorough assessments to inform decision-making. Demonstrating Technological Value: Showcase the value of developed technologies by conducting demonstrations that highlight their potential impact on IBM's businesses and collaborations with partners. End-to-End Expertise: Bring expertise across the entire development spectrum, from individual device intricacies to comprehensive system-level architecture, ensuring a holistic approach to solution building. Collaboration and Integration: Collaborate effectively with interdisciplinary teams, integrating hardware and software components seamlessly to create robust and innovative solutions. Adaptability and Innovation: Embrace adaptability and a forward-thinking mindset, staying attuned to technological advancements and incorporating innovative practices into the development lifecycle.
- 5+ years hands on experience in one or more of these areas: thru silicon via (TSV) process integration, hybrid bonding, temporary bonding-debonding, bumping, wafer level fan out, semiconductor packaging technology.
- 5+ years hands on experience in the back end of the line (BEOL) process integration covering Copper interconnects and dual damascene integration flow.
- 5+ years experience with interpreting failure analysis from structural and chemical characterization techniques.
- 5+ years experience or knowledge in performing quantitative analysis of electrical data to interpret experimental results.
- 5+ years experience with design of experiments, process controls, and statistical data analysis.
- 5+ years experience or knowledge in semiconductor and Chip Package Interaction (CPI) reliability analysis and failure mechanisms.
- MS/PhD degree in a science or engineering discipline.
- 7+ years hands on experience in one or more of these areas: thru silicon via (TSV) process integration, hybrid bonding, temporary bonding-debonding, bumping, wafer level fan out, semiconductor packaging technology.
- 7+ years experience with interpreting failure analysis from structural and chemical characterization techniques.
- 7+ years experience or knowledge in performing quantitative analysis of electrical data to interpret experimental results.
- 7+ years experience with design of experiments, process controls, and statistical data analysis.
- 7+ years hands on experience in the back end of the line (BEOL) process integration covering Copper interconnects and dual damascene integration flow.
- 7+ years experience or knowledge in semiconductor and Chip Package Interaction (CPI) reliability analysis and failure mechanisms.