Do you want to grow your career and challenge yourself? Are you interested in designing high-impact solutions to solve complex problems? Do you want to be part of an agile, cross-disciplinary team that collaborates to develop end-to-end solutions in the exciting field of Quantum computing? As a member of the Quantum team at IBM, you will have the opportunity to bring next generation Quantum computing to life. Our team works in a fast-paced, highly visible, matrixed environment where the opportunities for technical growth and leadership are extensive.
As a Design for Test Engineer, you will be responsible for pattern generation, simulation, validation, characterization, delivery, and support for IBM’s cutting-edge ASIC devices. A background in Computer Engineering or Electrical Engineering with strong programming skills is required. Prior knowledge of quantum computing is helpful but not required.
We are seeking a highly motivated DFT engineer to be part of Hardware team responsible for delivering next generation quantum computers. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBM’s microprocessor chip design team.
As a member of the DFT team (test design, insertion and verification) and Functional DFT (Power on reset, architectural verification program, and memory/logic BIST) teams, you will be required but not restricted to pattern generation, simulation, validation, characterization, delivery, hardware bring-up and silicon debug.
- Bachelor's or master's degree in computer/electrical engineering or related field
- Strong understanding of ASIC development and the semiconductor design process
- Proficiency in scripting languages such as Python, Tcl, or Perl for automation
- Technical interest in learning test design methodologies and workflows
- Excellent problem-solving skills
- Demonstrated ability to embrace and overcome challenges
- Strong verbal and written communication skills
- Demonstrated ability to contribute and collaborate effectively within diverse teams
- Technical proficiency including but not limited to:
- Industry-standard DFT tools (e.g., Synopsys TestMax)
- DFT techniques such as scan insertion, compression, MBIST/LBIST/ABIST, ATPG, and gate-level simulations
- Pattern generation, fault models, and basic debugging techniques.
- ASIC/FPGA development flows and post-silicon validation concepts
- Ability to develop and deepen skills through continuous learning and a growth mindset
- Demonstrated ability to remain adaptable in a dynamic environment
- Experience with version control (GitHub)
- Familiarity with RTL design languages (VHDL/Verilog)
- Knowledge of IBM Quantum architecture