As a core member of the Physical Design Team, you will be expected to work autonomously and deliver on project phases on time and on budget.
Duties and Responsibilities:
· Gathering System architecture requirements and developing and improving upon robust layout solutions
· Designing PCB layouts of high density, multi-layered, and high-speed circuit boards in Cadence Allegro PCB Editor on a rigorous schedule
· Demonstrating extensive knowledge of placement, wiring, padstacks, board outline restrictions, constraint interpretation, and various tuning methods
· Incorporating updates to existing component placements, routing, and constraints as needed to meet product requirements
· Must coordinate input from various disciplines such as Mechanical, Signal Integrity, and Power Integrity to ensure all requirements are met
· Support comprehensive design reviews and implement review feedback from internal and external teams while ensuring product schedules are met
· Responsible for executing final PD checks, Valor checks, and the generation of fabrication and assembly data for manufacturing
· Minimum 10 years of experience with Cadence’s Allegro PCB Editor
· Self-starter, able to independently drive tasks to completion
· Experience with Cadence’s Allegro PCB Editor version 17.2
· Experience with Cadence’s Allegro Design Entry HDL version 17.2
· Experience with Mentor Graphic’s (now Siemens’) Valor Process Engineering Solutions
· Foundational understanding of associated engineering skills such as Card Engineering, Signal Integrity, Power Engineering, Power Integrity, EMC, and more
· Strong analytical/problem solving skills and pronounced attention to details
· Strong communication skills