The Brain-Inspired Computing Team at IBM Research, creators of the NorthPole AI Inference accelerator, seeks a proven physical design engineer. If you have a strong desire to build the state-of-the-art AI chips, join us to make AI faster and more efficient.
Ideal candidates will have prior successful tapeouts in advanced technologies (using FinFETs at 12nm nodes or below) and be able to:
- Create a Physical Design flow using Cadence tools, including synthesis, floorplanning, power-grid creation, CTS, place and route, and signoff
- Implement a clock tree in Innovus on a chip-scale canvas with low skew and slew, and perform OCV analysis on the clock tree to extract all figures of merit and evaluate designs
- Perform and understand results of STA, timing closure and timing signoff
• At least 5 years experience with Cadence tools in the areas of physical design, including clock tree synthesis and implementation, including Innovus for Place and Route, hierarchical integration, signoff
• At least 3 years advanced TCL scripting
• Synthesis experience with Cadence Genus
• Power/Performance/Area analysis and optimization